Hello Waijung (Part II : Open-Loop Test)

Hello Waijung

Part II: Open-Loop Test

Before you read on, make sure you at least glimpse on our previous artile in the Hello Waijung series.

From part I, with the required hardware set up properly, we are now ready to run our first experiment. To make sure that all the connections and communication work, we will start with a simple model consisting of only the plant; i.e., our RC network.

If you have not done so, install the ST-Link utility and WaiJung. Consult the developer’s website for details. On my computer, I experienced during WaiJung installation that the setup file complained it couldn’t find ST-Link, but after I continued by ignoring that warning, the tool worked fine.

The SIMULINK setup for this experiment (as well as later ones) comes in pair: the target and host models are separated to two files. Figure 1 and 2 show OpenLoop_Target.mdl and OpenLoop_Host.mdl, the target and host model files for our open loop test, respectively.

Figure 1 SIMULINK file for target OpenLoop_Target.mdl

Figure 2 SIMULINK file for host OpenLoop_Host.mdl

The configuration and execution process for these models is listed as follows

  • Signal routing
    • (target) configure the ADC and DAC modules
  • Communication
    • (target) select the USART channel and configure
    • (host) select the right COM port and configure its parameters to match the target setup
  • (host) compute the plant transfer function, discretize, and put data into model
  • (target) update, build and load
  • (host) run the simulation to observe real-time signal plots

Now we provide more details for each step.

Target ADC Module Configuration

From the hardware setup in part I, we decide to use AN11 for capacitor voltage reading. Figure 3 shows how to configure the ADC block in OpenLoop_Target.mdl. Click on the block to open the parameter dialog window and select Read AN11 (Pin: C1) dialog box.

Figure 3 ADC module configuration in OpenLoop_Target.mdl

Target DAC Module Configuration

To use DAC2, in OpenLoop_Target.mdl, click on the DAC block and select DAC2 (A5) check box as shown in Figure 4. Leave other parameters intact since they are the values used on the STM32F4DISCOVERY DAC module.

Figure 4 DAC module configuration in OpenLoop_Target.mdl

Target USART Module Configuration

Figure 5 illustrates USART configuration in OpenLoop_Target.mdl. USART 3 is selected with pin D8 and D9 as Tx and Rx, respectively. We recommend that you leave other parameters as shown to use typical protocol 115200, 8, N, 1 with no hardware flow control. If some parameter is changed, say, the baud rate, you need to make sure that parameter in the host model file is adjusted to match. In any case, do not select hardware flow control since the protocol needs additional signals CTS and RTS, which are not wired in hardware setup from part I.

There are a couple of related modules in OpenLoop_Target.mdl that need to be configured to use USART 3; i.e., UART Rx and UART Tx. Click on the modules and select UART Module 3 from the parameter pull-down menu.

Figure 5 USART module configuration in OpenLoop_Target.mdl

Host COM Port Configuration

Before setting the host communication, you need to know which COM port your USB-to-serial hardware is using. An easy way to check for Windows OS is to open Control Panel -> Device Manager, anc click on Ports (COM & LPT). On my computer the UM232R module consumes COM5, so I set up all the communication blocks in OpenLoop_Host.mdl to use COM5, as demonstrated in Figure 6. Other parameters must match those of the target. Leave them as is to use protocol 115200, 8, N, 1 with no hardware flow control.

Figure 6 COM port configuration in OpenLoop_Host.mdl

Setup The Plant Transfer Function

From basic knowledge of signal & system course, we recall that a transfer function of RC circuit connected as a LPF (see Figure 3 of Part I ) can be written as

(1)   \begin{equation*}  G(s) = \frac{1}{1+RCs} \end{equation*}

substituting R = 3.3 K\Omega and C = 470 \mu F

(2)   \begin{equation*}  G(s) = \frac{1}{1+1.551s} \end{equation*}

Create this transfer function in MATLAB to verify

>> R = 3300; C = 470e-6;
>> G = tf(1,[R*C 1])
G = 
  1.551 s + 1 
Continuous-time transfer function.

To perform the real-time simulation simultaneously with the real RC circuit, we need a discrete transfer function representation. The conversion can be done easily in MATLAB with c2d command. Assume a sampling time of 0.01 second with default ZOH method

>> Gd = c2d(G,0.01)
Gd =
  z - 0.9936
Sample time: 0.01 seconds
Discrete-time transfer function.

So, in OpenLoop_Host.mdl , we put Gd into the discrete transfer function block as in Figure 7. That’s all for the open-loop test, since we don’t need any controller at this moment.

Figure 7 specifying the discrete transfer function of RC circuit

Update, Build, and Load the Target

Assuming all the setup process is done correctly, the next step is to compile and build the target code, then load it into the processor on STM32F4DISCOVERY board. You must have the prototype connected to the PC via ST-Link USB (the mini-B connector on the board), which is used to download the program. Actually, connect all the hardware from Part I to the PC at this moment. The USB-to-serial is used for data communication when simulation is running.

Since we have modified the target model, press Ctrl-D to update diagram. After you see all the blocks turn red, press Crtl-B or click on the Build Model button. The build process window appears as in Figure 8. If everything is ok, all the steps turn green and the code is loaded to the board and run. A red flag on any step indicates error. For instance, WaiJung may not be installed correctly, or target board is not connected.

Figure 8 build process window

Run the Simulation

I assume you have all green pass like in Figure 8 before clicking the run button in the OpenLoop_Host.mdl file. If everything works properly as it should, you’d see the plot as shown in Figure 9 after clicking on any small scope icon along signal path. The plot continues until it reaches the specified final time, which is set for 30 seconds.

Figure 9 real-time simulation of the open-loop RC circuit

I also create another indicator in hardware to check if the communication works. A green-orange LED is wired to TxLED and RxLED pins of FT232R USB-to-serial chip. As shown in Figure 10, the dual color LED blinks as data is transmitted and received between host and target.

Figure 10 dual color LED blinks during data communication

After the simulation ends, we have the plot shown in Figure 11. To elaborate, the input voltage fed to the plant input (pink) is generated by the DAC module. With 5 seconds duration, the voltage switches between 1 V and 2 V. The plant output is specified as voltage across the capacitor (refer to the circuit diagram in Figure 3 from part I). The theoretical output from discrete-time transfer function (red) is compared with the real voltage measured via the ADC (blue). We can see that they match quite well, though voltage error is noticeable around the end of voltage rise in each cycle. Also, the real voltage is slightly contaminated by measurement noise.

Figure 11 the simulation result from open-loop test

As simple as it appears, this open-loop test verifies that both the signal passing through the RC plant and the host-target communication work properly. Now we are confident to craft a controller and study feedback system responses with the simulated and real plant, which are the topics for the rest of this Waijung series.

Next: Hello Waijung Part III: Feedback Control



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