Part II: Open-Loop TestBefore you read on, make sure you at least glimpse on our previous artile in the Hello Waijung series. WaiJung. Consult the developer’s website for details. On my computer, I experienced during WaiJung installation that the setup file complained it couldn’t find ST-Link, but after I continued by ignoring that warning, the tool worked fine.
The SIMULINK setup for this experiment (as well as later ones) comes in pair: the target and host models are separated to two files. Figure 1 and 2 show OpenLoop_Target.mdl and OpenLoop_Host.mdl, the target and host model files for our open loop test, respectively.
- Signal routing
- (target) configure the ADC and DAC modules
- (target) select the USART channel and configure
- (host) select the right COM port and configure its parameters to match the target setup
- (host) compute the plant transfer function, discretize, and put data into model
- (target) update, build and load
- (host) run the simulation to observe real-time signal plots
Now we provide more details for each step.
Target ADC Module ConfigurationFrom the hardware setup in part I, we decide to use AN11 for capacitor voltage reading. Figure 3 shows how to configure the ADC block in OpenLoop_Target.mdl. Click on the block to open the parameter dialog window and select Read AN11 (Pin: C1) dialog box.
Target DAC Module ConfigurationTo use DAC2, in OpenLoop_Target.mdl, click on the DAC block and select DAC2 (A5) check box as shown in Figure 4. Leave other parameters intact since they are the values used on the STM32F4DISCOVERY DAC module.
Target USART Module ConfigurationFigure 5 illustrates USART configuration in OpenLoop_Target.mdl. USART 3 is selected with pin D8 and D9 as Tx and Rx, respectively. We recommend that you leave other parameters as shown to use typical protocol 115200, 8, N, 1 with no hardware flow control. If some parameter is changed, say, the baud rate, you need to make sure that parameter in the host model file is adjusted to match. In any case, do not select hardware flow control since the protocol needs additional signals CTS and RTS, which are not wired in hardware setup from part I. There are a couple of related modules in OpenLoop_Target.mdl that need to be configured to use USART 3; i.e., UART Rx and UART Tx. Click on the modules and select UART Module 3 from the parameter pull-down menu.
Host COM Port ConfigurationBefore setting the host communication, you need to know which COM port your USB-to-serial hardware is using. An easy way to check for Windows OS is to open Control Panel -> Device Manager, anc click on Ports (COM & LPT). On my computer the UM232R module consumes COM5, so I set up all the communication blocks in OpenLoop_Host.mdl to use COM5, as demonstrated in Figure 6. Other parameters must match those of the target. Leave them as is to use protocol 115200, 8, N, 1 with no hardware flow control.
Setup The Plant Transfer FunctionFrom basic knowledge of signal & system course, we recall that a transfer function of RC circuit connected as a LPF (see Figure 3 of Part I ) can be written as
(2)Create this transfer function in MATLAB to verify
To perform the real-time simulation simultaneously with the real RC circuit, we need a discrete transfer function representation. The conversion can be done easily in MATLAB with c2d command. Assume a sampling time of 0.01 second with default ZOH method
>> R = 3300; C = 470e-6; >> G = tf(1,[R*C 1]) G = 1 ----------- 1.551 s + 1 Continuous-time transfer function.
So, in OpenLoop_Host.mdl , we put Gd into the discrete transfer function block as in Figure 7. That’s all for the open-loop test, since we don’t need any controller at this moment.
>> Gd = c2d(G,0.01) Gd = 0.006427 ---------- z - 0.9936 Sample time: 0.01 seconds Discrete-time transfer function.